Phase change memory with dual word lines and source lines and method of operating same
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United States of America Patent
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Jun 1, 2010
Grant Date -
Feb 5, 2009
app pub date -
Aug 2, 2007
filing date -
Aug 2, 2007
priority date (Note) -
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Abstract
A phase change memory device includes a memory cell, first word line conductor and a second word line conductor, and first and second access devices responsive to the first and second word line conductors respectively. Control circuits are arranged to access the memory cell for read operations using only the first word line conductor to establish a current path from the bit line through the memory cell to a source line through the first access device, and to access the memory cell for operations to reset the memory cell using both the first and second access devices to establish a current path from the bit line through the memory cell to two source lines.
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