Method for radiation tolerance by logic book folding

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United States of America Patent

PATENT NO 7698681
APP PUB NO 20090045840A1
SERIAL NO

11838273

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A logic book for a programmable device such as an application-specific integrated circuit (ASIC) achieves improved radiation tolerance by providing transistors of the same doping type in different well regions that are physically isolated by intervening well regions with complementary doping. For example, n-type field effect transistors (NFETs) may be located in two outer rows of the book with separate Pwell regions, while p-type transistors are located in two inner rows of the book sharing a common Nwell region. Since the NFETs in separate wells are physically isolated from each other, a circuit structure which uses two NFETs in the two outer rows is much less likely to suffer multiple upsets from a single radiation strike. More complicated embodiments of the present invention include additional transistor rows in the stack with isolated Nwells and Pwells.

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Patent Owner(s)

  • INTERNATIONAL BUSINESS MACHINES CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Beckenbaugh, Mark R Rochester, US 7 27
KleinOsowski, AJ Austin, US 16 201
Lukes, Eric J Stewartville, US 11 28
Scott, Byron D Rochester, US 4 51

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