Memory with surface strap
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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N/A
Issued Date -
Mar 5, 2009
app pub date -
Sep 4, 2007
filing date -
Sep 4, 2007
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A memory with a surface strap. The memory comprises a trench capacitor, a self-aligned surface strap and a MOS transistor. The trench capacitor is formed in a semiconductor substrate. The self-aligned surface strap covers an opening of the trench capacitor and a active region in the periphery thereof. One of the source/drain regions of the MOS transistor is connected to the surface strap and the other is connected to a bit line.
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