Multilayer substrate with interconnection vias and method of manufacturing the same
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United States of America Patent
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Issued Date -
Mar 19, 2009
app pub date -
Aug 13, 2008
filing date -
Aug 15, 2007
priority date (Note) -
Abandoned
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Abstract
A method is provided for manufacturing a multilayer substrate. An insulating layer can have a hole overlying a patterned second metal layer. In turn, the second metal layer can overlie a first metal layer. A third metal layer can be electroplated onto the patterned second metal layer within the hole, the third metal layer extending from the second metal layer onto a wall of the hole. When plating the third metal layer, the first and second metal layers can function as a conductive commoning element.
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