METHOD FOR FORMING A DIELECTRIC STACK

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United States of America Patent

APP PUB NO 20090079016A1
SERIAL NO

12272614

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Abstract

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The present invention provides a method for fabricating a dielectric stack in an integrated circuit comprising the steps of (i) forming a high-k dielectric layer on a semiconductor substrate, (ii) subjecting the semiconductor substrate with the high-k dielectric layer to a nitrogen comprising vapor phase reactant and silicon comprising vapor phase reactant in a plasma-enhanced chemical vapor deposition process (PECVD) or a plasma-enhanced atomic layer chemical vapor deposition (PE ALCVD) process. Furthermore, the present invention provides a dielectric stack in an integrated circuit comprising (i) a high-k dielectric layer comprising at least a high-k material, (ii) a dielectric layer comprising at least silicon and nitrogen; (iii) an intermediate layer disposed between the high-k dielectric layer and the dielectric layer, the intermediate layer comprising the high-k material, silicon, and nitrogen.

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Patent Owner(s)

Patent OwnerAddress
ASM AMERICA INC3440 EAST UNIVERSITY DRIVE PHOENIX AS 85034
INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)KAPELDREEF 75 LEUVEN 3001

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Caymax, Mathieu Leuven , BE 4 57
Chen, Peijun Jerry Dallas , US 3 24
Maes, Jan Willem Wilrijk , BE 111 19161
Wilman, Tsai Saratoga , US 2 24

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