INTER-CONNECTING STRUCTURE FOR SEMICONDUCTOR PACKAGE AND METHOD OF THE SAME
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United States of America Patent
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app pub date -
Nov 14, 2007
filing date -
Oct 15, 2007
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Abandoned
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Abstract
The interconnecting structure for a semiconductor die assembly comprises a build-up layers having RDL formed therein formed over a die having die pads formed thereon, wherein the RDL is coupled to the die pads; an isolation base having ball openings attached over the build-up layer to expose ball pads within the build-up layers; and conductive balls placed into the ball openings of the isolation base and attached on the ball pads within the build-up layers.
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