Method and Apparatus of Providing the Security and Error Correction Capability for Memory Storage Devices

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United States of America Patent

APP PUB NO 20090125726A1
SERIAL NO

11949652

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A method and apparatus of configuring the byte structure of a memory storage device, including a flash memory device, to enhance the security and error correction capability is described. In one embodiment, the method includes increasing the security of data stored in the storage device by encrypting data with a unique initialization vector and storing the initialization vector in the storage device. The method also includes using a unique initialization vector for encrypting data, to be stored in each datablock, each time data are encrypted. In one embodiment, the apparatus includes an AES controller that includes encryption and decryption modules to encrypt and decrypt data prior to writing data to or reading from the storage device. The apparatus also includes an encoder module and decoder circuits to encode and decode data prior to writing or reading from memory storage devices. The apparatus optionally includes a state machine that generates and provides the initialization vector and also activates different components of AES controller and ECC module depending on the operation of the device.

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Patent Owner(s)

Patent OwnerAddress
TECHNOLOGY PROPERTIES LIMITED LLC20883 STEVENS CREEK BOULEVARD SUITE 100 CUPERTINO CA 95014

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Iyer, Sree M San Jose, US 14 416
Kumar, Santosh Santa Clara, US 104 1143
Ramiya, Mothilal Arunprasad Santa Clara, US 7 281

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