Importance

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Abstract

In a first aspect, a three dimensional programmable logic device (PLD) comprises a plurality of distributed programmable elements located in a substrate region; and a contiguous array of configuration memory cells, a plurality of said memory cells coupled to the plurality of programmable elements to configure the programmable elements, wherein: the memory array is positioned substantially above or below the substrate region; and the memory array and the substrate region layout geometries are substantially similar. In a second aspect, the 3D PLD comprises a contiguous array of metal cells, each metal cell having the configuration memory cell dimensions and a metal stub coupled to a said configuration memory cell and to one or more of said programmable elements.

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First Claim