METHOD, CIRCUIT AND SYSTEM FOR SENSING A CELL IN A NON-VOLATILE MEMORY ARRAY
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United States of America Patent
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Issued Date -
May 21, 2009
app pub date -
Nov 15, 2007
filing date -
Nov 15, 2007
priority date (Note) -
Abandoned
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Abstract
Disclosed is a method, circuit and system for evaluating the status of a data storage area in a non-volatile memory cell within a non-volatile memory cell array. According to some embodiments of the present invention, leakage current in at least one other cell in proximity with the cell being evaluated is suppressed. Leakage current suppression may be achieved by applying a suppression voltage to the word of the cell(s) whose leakage current(s) are to be suppressed.
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