Fatigue management system and method for hybrid nonvolatile solid state memory system
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United States of America Patent
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Oct 6, 2015
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Feb 4, 2009
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Dec 11, 2006
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Abstract
A solid state memory system comprises a first nonvolatile semiconductor memory having a first write cycle lifetime and a first set of physical addresses, and a second nonvolatile semiconductor memory having a second write cycle lifetime and a second set of physical addresses. The first write cycle lifetime is greater than the second write cycle lifetime. The system further comprises a fatigue management module to generate a write frequency ranking for a plurality of logical addresses. The fatigue management module maps each of the plurality of logical addresses to a physical address of the first set of physical addresses or the second set of physical addresses based on the write frequency rankings.
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