POWER SUPPLY TESTING ARCHITECTURE

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United States of America Patent

APP PUB NO 20090164809A1
SERIAL NO

12294270

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Abstract

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A power supply testing architecture for embedded sub-systems is described, where each embedded sub-system can have at least one testable internal voltage supply. A plurality of embedded sub-systems are organized into groups, where each group of sub-systems shares a common voltage test line connected to the internal voltage supplies of the sub-systems. Accordingly, the collective internal voltages of each group can be tested in parallel. A power control signal can disable the internal voltage supply of all the sub-systems to allow application of an external power to the common voltage test lines. Alternately, the sub-systems in each group can be tested sequentially, such that each enabled sub-system of the group has dedicated access to its common voltage test line. In such a scheme, dedicated power control signals are used to independently disable each sub-system of the groups.

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Patent Owner(s)

Patent OwnerAddress
MOSAID TECHNOLOGIES INCORPORATED515 LEGGET DRIVE SUITE 100 OTTAWA K2K 3G4

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kim, Jin-Ki Ottawa , CA 226 5804

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