MEMORY CELL WITH PLANARIZED CARBON NANOTUBE LAYER AND METHODS OF FORMING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
Jul 2, 2009
app pub date -
Dec 31, 2007
filing date -
Dec 31, 2007
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
In some aspects, a method of fabricating a memory cell is provided that includes (1) fabricating a first conductor above a substrate; (2) fabricating a carbon nano-tube (CNT) material above the first conductor; (3) depositing a dielectric material onto a top surface of the CNT material; (4) planarizing the dielectric material to expose at least a portion of the CNT material; (5) fabricating a diode above the first conductor; and (6) fabricating a second conductor above the CNT material and the diode. Numerous other aspects are provided.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully