ERROR-TOLERANT PROCESSOR SYSTEM
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United States of America Patent
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Issued Date -
Aug 13, 2009
app pub date -
Dec 12, 2006
filing date -
Dec 22, 2005
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A processor system includes at least one execution unit for executing program instructions of an application, a program memory for storing the program instructions of the application and at least one error handling routine, a main memory for storing a set of variables of the application and a monitoring unit for detecting errors of the execution unit and/or of the main memory, and the starting of an error handling routines in case an error is detected. The error handling routines are designed in each case to refresh different subsets of the set of variables.
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