DETERMINING AND ANALYZING INTEGRATED CIRCUIT YIELD AND QUALITY

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United States of America Patent

SERIAL NO

12415806

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Methods, apparatus, and systems for computing, analyzing, and improving integrated circuit yield and quality are disclosed herein. For example, in one exemplary method disclosed herein, information is received from processing test responses of integrated circuits designed for functional use in electronic devices. In this embodiment, the information is indicative of integrated circuit failures observed during testing of the integrated circuits and of possible yield limiting factors causing the integrated circuit failures. Probabilities that one or more of the possible yield limiting factors in the integrated circuits actually caused the integrated circuit failures are determined by statistically analyzing the received information. The probabilities that one or more possible yield limiting factors actually caused the integrated circuit failures are reported. Tangible computer-readable media comprising computer-executable instructions for causing a computer to perform any of the described methods are also disclosed.

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Patent Owner(s)

Patent OwnerAddress
MENTOR GRAPHICS CORPORATION8005 SW BOECKMAN ROAD WILSONVILLE OR 97070-7777

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Gang Wilsonville , US 944 8640
Keim, Martin Sherwood , US 15 310
Rajski, Janusz West Linn , US 143 3877
Sharma, Manish Wilsonville , US 372 5594
Tamarapalli, Nagesh Wilsonville , US 21 660
Tang, Huaxing Wilsonville , US 22 374

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