Display panel including dummy pixels and display device having the panel

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United States of America Patent

PATENT NO 8330691
APP PUB NO 20090231255A1
SERIAL NO

12301132

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Abstract

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A dummy line, which is disposed in a dummy pixel region (2) on the side of a test wiring region (1) and which has a parasitic capacitance effect like that of an adjacent scanning line (Gj) in an effective display region (3), is commonly used as a test switch line (1a). This test switch line (1a) is provided away from a dummy scanning line (DG) by intervals at which the scanning lines (Gj) are provided in the effective display region (3). As a result, it is possible to realize a display panel capable of reducing a frame area while keeping a test circuit region and the dummy pixel region in the frame area, and a display device having the display panel.

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Patent Owner(s)

  • SHARP KABUSHIKI KAISHA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Morinaga, Junichi Matsusaka, JP 56 168
Tanimoto, Kazunori Kizugawa, JP 10 120

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