Interconnections for integrated circuits including reducing an overburden and annealing
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United States of America Patent
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Nov 16, 2010
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app pub date -
Mar 14, 2008
filing date -
Mar 14, 2008
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Abstract
The present invention discloses a method of manufacturing an integrated circuit on a semiconductor substrate having a semiconductor device provided thereon, including the steps of forming a copper layer having an overburden of a desired thickness, forming a layer of inert metal on the copper layer, annealing the copper layer and removing the layer of inert metal.
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