Multiple Layer Metal Integrated Circuits and Method for Fabricating Same
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United States of America Patent
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Issued Date -
Oct 1, 2009
app pub date -
Mar 28, 2008
filing date -
Mar 28, 2008
priority date (Note) -
Abandoned
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Abstract
A method of fabricating a plurality of layers of metal on a substrate depositing a first layer of metal on the substrate; depositing a first layer of planarization material over the substrate and first layer of metal to a depth above the top of the first layer of metal; polishing the first layer of planarization material down to at least the top of the first layer of metal; and depositing a second layer of metal on the first layer of metal and the first layer of planarization material.
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