MOSFET and production method of semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7964921
APP PUB NO 20090250771A1
SERIAL NO

11990747

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

To provide a MOSFET which is increased in substrate bias effect .gamma. without increasing parasitic capacitance and junction leak current, the MOSFET includes: a gate electrode (104) formed on a semiconductor substrate (101) and an insulating film (103); a sidewall insulating film (106) covering the side surface of the gate electrode (104); and source/drain regions surrounded by the sidewall insulating film (106) and a shallow trench isolation (102) in a self-alignment manner, in which an impurity concentration of a first conductivity type which is the same type as a well-forming impurity has a profile becoming, in a lower direction of the gate electrode (104), lower in a channel formation region, then higher and again lower, and a high-concentration first conductivity type impurity region (110) is provided, in which the impurity concentration of the first conductivity type is formed to be low in the source/drain regions and to be high below the gate electrode (104) sandwiched between the source/drain regions.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • RENESAS ELECTRONICS CORPORATION

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Miyamura, Makoto Tokyo, JP 39 225

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation