Silicon Wafer Having Through-Wafer Vias With A Predetermined Geometric Shape
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United States of America Patent
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Issued Date -
Oct 8, 2009
app pub date -
Jun 16, 2009
filing date -
May 4, 2005
priority date (Note) -
Abandoned
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Abstract
A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other, forming in the semiconductor substrate at least one trench of a predetermined geometric shape in the first main surface, lining the at least one trench with a dielectric material, filling the at least one trench with a conductive material, electrically connecting an electrical component to the conductive material of the at least one trench at the first main surface; and mounting a cap to the first main surface. The at least one trench extends to a first depth position D in the semiconductor substrate. The cap encloses at least a portion of the electrical component and the electrical connection between the electrical component and the conductive material.
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