CONDUCTIVE HARD MASK TO PROTECT PATTERNED FEATURES DURING TRENCH ETCH

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United States of America Patent

SERIAL NO

12502796

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Abstract

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A monolithic three dimensional memory array is formed by a method that includes forming a first memory level above a substrate by i) forming a plurality of first substantially parallel conductors extending in a first direction, ii) forming first pillars above the first conductors, each first pillar comprising a first conductive layer or layerstack above a vertically oriented diode, the first pillars formed in a single photolithography step, iii) depositing a first dielectric layer above the first pillars, and iv) etching a plurality of substantially parallel first trenches in the first dielectric layer, the first trenches extending in a second direction, wherein, after the etching step, the lowest point in the trenches is above the lowest point of the first conductive layer or layerstack, wherein the first conductive layer or layerstack does not comprise a resistivity-switching metal oxide or nitride. The method also includes monolithically forming a second memory level above the first memory level. Other aspects are also described.

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Patent Owner(s)

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SANDISK TECHNOLOGIES LLC6900 DALLAS PARKWAY SUITE 325 PLANO TX 75024

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dunton, Samuel V San Jose , US 20 508
Konevecki, Michael W San Jose , US 19 1105
Radigan, Steven J Fremont , US 39 676
Raghuram, Usha San Jose , US 38 1160

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