Error detection on programmable logic resources

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United States of America Patent

PATENT NO 7907460
APP PUB NO 20090282306A1
SERIAL NO

12503637

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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Error detection circuitry is provided on a programmable logic resource. Programmable logic resource configuration data is loaded into a cyclic redundancy check (CRC) module where a checksum calculation may be performed. In one embodiment, the checksum may be compared to an expected value, which is a precomputed checksum on data prior to being programmed into or while data is being programmed into a programmable logic resource. In another embodiment, the expected value may be included in the checksum calculation. An output indicating whether an error is detected may be generated depending on the relationship between the checksum and the expected value, or on the value of the checksum. This output may be sent to an output pin that is accessible by user logic.

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Patent Owner(s)

  • ALTERA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lee, Andy L San Jose, US 148 2460
Ngo, Ninh D San Jose, US 18 412
Veenstra, Kerry San Jose, US 61 2382

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