STACKED MICROELECTRONIC LAYER AND MODULE WITH THREE-AXIS CHANNEL T-CONNECTS
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United States of America Patent
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Issued Date -
Jan 14, 2010
app pub date -
Sep 18, 2009
filing date -
Apr 22, 2002
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A method for interconnecting stacked layers containing integrated circuit die and a device built from the method is disclosed. The stacked layers are bonded together to form a module whereby individual I/O pads of the integrated circuit die are rerouted to at least one edge of the module. The rerouted leads terminate at the edge. Channels are formed in a surface of the module or on the surface of a layer whereby the rerouted leads are disposed within the channel. The entire surface of the edge or layer is metalized and a predetermined portion of the metalization removed such that the rerouted leads within each channel are electrically connected to each other.
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