CHIP CAPACITOR EMBEDDED PWB

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20100071944A1
SERIAL NO

12519950

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A multiple wiring layer interconnection element includes capacitors or other electrical components embedded between a first exposed wiring layer and a second exposed wiring layer of the interconnection element. Internal wiring layers and are provided between exposed surfaces of the respective capacitors, the internal wiring layers being electrically insulated from the capacitors by dielectric layers. The internal wiring layers are isolated from each other by an internal dielectric layer. Conductive vias provide conductive interconnection between the two internal wiring layers. A method of fabricating a multiple wiring layer interconnection element is also provided.

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Patent Owner(s)

Patent OwnerAddress
INVENSAS CORPORATION3025 ORCHARD PARKWAY SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Endo, Kimitaka Yokohama, JP 27 651

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