Ferroelectric Memory Cell Arrays and Method of Operating the Same

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20100110753A1
SERIAL NO

12262830

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An integrated circuit includes a plurality of switching devices, wherein each device includes a gate dielectric capable of assuming at least a first and a second polarization state. The integrated circuit further includes an address circuit configured to control bit lines electrically coupled to first load regions of a load path of the switching devices and a word line electrically coupled to gate electrodes of the switching devices. The address circuit is configured to control a write cycle such that a first voltage is induced at the gate dielectrics of selected ones of the switching devices and a second voltage is induced at the gate dielectrics of non-selected ones of the switching devices. The first voltage suffices to switch the gate dielectrics of the selected devices from the first to the second polarization state and the second voltage does not suffice to switch the gate dielectrics of the non-selected devices.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
QIMONDA AGGUSTAV-HEINEMANN-RING 212 MUNICH 81739

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jakschik, Stefan Leuven, BE 27 336
Slesazeck, Stefan Dresden, DE 21 670
Weis, Rolf Dresden, DE 146 1480

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation