Mixed-Mode ROM/RAM Booting Using an Integrated Flash Controller with NAND-Flash, RAM, and SD Interfaces
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United States of America Patent
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app pub date -
Dec 31, 2009
filing date -
Jan 6, 2000
priority date (Note) -
Abandoned
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Abstract
A Secure Digital (SD) flash microcontroller includes a memory interface to SRAM or DRAM, a flash-memory interface, and a SD interface to an SD bus. The flash memory can be on a flash bus or on the SD bus. The microcontroller is booted from boot code stored in the flash memory. An initial boot loader is read from the first page of flash by a state machine and written to a small RAM. A central processing unit (CPU) in the microcontroller reads instructions from the small RAM, executing the initial boot loader, which reads more pages from flash. These pages are buffered by the small RAM and written to a larger DRAM. Once an extended boot sequence is written to DRAM, the CPU toggles a RAM_BASE bit to cause instruction fetching from DRAM. Then the extended boot sequence is executed from DRAM, copying an OS image from flash to DRAM.
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