Delay-locked loop circuit controlled by column strobe write latency

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8049545
APP PUB NO 20100156488A1
SERIAL NO

12644044

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The DLL circuit includes a control circuit which controls bias currents of the unit delay circuits according to an externally input column address strobe writing latency (CWL) signal, and/or a DCC control circuit which adjusts steps of a DCC current of the DCC according to the externally input column address strobe writing latency (CWL) signal. The CWL signal may be input by a semiconductor memory device and may be indicative of a column address strobe writing latency of the semiconductor memory device. The semiconductor memory device may be a double data rate (DDR) synchronous DRAM (SDRAM) device.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
SAMSUNG ELECTRONICS CO., LTD.SUWON-SI GYEONGGI-DO56501

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hyun, Seok-hun Yongin-si, KR 10 40
Kim, Yang-ki Seoul, KR 13 131

Cited Art Landscape

Patent Info (Count) # Cites Year
 
POLARIS INNOVATIONS LIMITED (1)
* 2009/0267,663 ELECTRONIC SYSTEM THAT ADJUSTS DLL LOCK STATE ACQUISITION TIME 6 2008
 
NANYA TECHNOLOGY CORPORATION (1)
* 2008/0169,851 DELAY LOCKED LOOP 2 2007
 
TEXAS INSTRUMENTS INCORPORATED (1)
* 2009/0033,388 Systems and Methods for Reduced Area Delay Locked Loop 3 2007
 
SAMSUNG ELECTRONICS CO., LTD. (2)
* 7786752 Memory systems, on-die termination (ODT) circuits, and method of ODT control 11 2007
* 2010/0213,992 Delay locked loop circuit and operation method thereof 6 2010
 
HYNIX SEMICONDUCTOR INC. (1)
* 2011/0058,433 LATENCY CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME, AND METHOD FOR CONTROLLING LATENCY 2 2009
 
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC. (1)
* 7551012 Phase shifting in DLL/PLL 3 2007
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
ETRON TECHNOLOGY, INC. (2)
* 8432206 Delay lock loop system with a self-tracking function and method thereof 1 2012
* 2012/0256,666 DELAY LOCK LOOP SYSTEM WITH A SELF-TRACKING FUNCTION AND METHOD THEREOF 1 2012
 
SAMSUNG ELECTRONICS CO., LTD. (5)
* 8199607 Duty cycle corrector preventing excessive duty cycle correction in low-frequency domain 1 2010
* 2010/0226,196 DUTY CYCLE CORRECTOR PREVENTING EXCESSIVE DUTY CYCLE CORRECTION IN LOW-FREQUENCY DOMAIN 1 2010
* 8536914 DLL including 2-phase delay line and duty correction circuit and duty correction method thereof 0 2011
* 2011/0215,851 DLL INCLUDING 2-PHASE DELAY LINE AND DUTY CORRECTION CIRCUIT AND DUTY CORRECTION METHOD THEREOF 5 2011
9536580 Clock signal processor and non-volatile memory device including the same 0 2015
 
Solid State System Co., Ltd. (2)
* 8823388 Calibration circuit and calibration method 0 2011
* 2012/0306,557 CALIBRATION CIRCUIT AND CALIBRATION METHOD 1 2011
 
RICOH COMPANY, LTD. (1)
* 9396789 Memory control device and a delay controller 0 2015
* Cited By Examiner

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