ASYMMETRIC STATIC RANDOM ACCESS MEMORY
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United States of America Patent
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Issued Date -
Jul 15, 2010
app pub date -
Jan 9, 2009
filing date -
Jan 9, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An asymmetric static random access memory (SRAM) device that includes at least one SRAM cell is provided. The SRAM cell includes the first inverter and the second inverter. The first inverter is coupled between a first power and a ground power, and includes a first output terminal coupled to a first node and a first input terminal coupled to a second node. The second inverter is coupled between the first power and the ground power, and includes a second input terminal coupled to the first node and a second output terminal coupled to the second node. When the first inverter and the second inverter receive current from the first power, the SRAM cell is programmed to a predetermined value in advance according to different conductance levels of the first inverter and the second inverter.
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