Importance

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Abstract

An integrated circuit an array of nodes linked by an on-chip communication network. Messages are communicated between nodes utilizing logical channels representing hardware resources at the associated nodes. A given logical channel is associated with a receiver node and a transmitter node. The receiver node is adapted to send flow control messages to the transmitter node. The flow control messages include credits that identify hardware resources of the receiver node that are available for receiving messages over the given logical channel. The transmitter node is adapted to maintain a running total of the credits included as part of the flow control messages communicated from the receiver node and to initiate transmission of messages to the receiver node in accordance with the running total of credits maintained at the transmitter node. In the preferred embodiment, the transmitter node is adapted to initiate transmission of a message to the receiver node only if the total number of credits maintained at the transmitter node is sufficient to store the message at the receiver node. A given credit can include an address generated by a receiver node and representing an address in the local memory of the receiver node for storing data. The transmitter node transmits the address of the given credit to the receiver node for storing data therein.

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First Claim