Power transistor package with integrated bus bar
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United States of America Patent
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Aug 9, 2011
Grant Date -
Aug 12, 2010
app pub date -
Feb 9, 2009
filing date -
Feb 9, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
According to one embodiment, a power transistor package includes an electrically conductive flange configured to be connected to a source of a power transistor device. The package further includes a first terminal mechanically fastened to the flange and configured to be electrically connected to a gate of the power transistor device and a second terminal mechanically fastened to the flange and configured to be electrically connected to a drain of the power transistor device. The package also includes a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange. The bus bar is configured to be electrically connected to the drain via one or more RF grounded connections.
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