ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT AND INTEFRATED CIRCUIT UTILIZING THE SAME
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United States of America Patent
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Issued Date -
Aug 19, 2010
app pub date -
Feb 13, 2009
filing date -
Dec 26, 2008
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
An ESD protection circuit coupled between a first power line and a second power line to avoid damage to an integrated circuit by an ESD event is disclosed. The ESD protection circuit includes a detection unit, a trigger unit, and a discharging unit. The detection unit asserts a detection signal when the ESD event occurs. The trigger unit asserts a first trigger signal and a second trigger signal when the detection is asserted. The discharging unit provides a discharge path to release an ESD current caused by the ESD event when the first and the second trigger signals are asserted.
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