Circuit layout and method and device for producing a circuit pattern on a substrate
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United States of America Patent
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Issued Date -
Sep 16, 2010
app pub date -
Mar 5, 2010
filing date -
Mar 7, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A circuit layout having a substrate with at least one electronic component, wherein contacts of the electronic component are electrically connected to contacting regions of a conductor strip. Furthermore, a method for producing a circuit pattern is provided, whereby at least one conductor strip is attached onto at least one surface side of the substrate, the conductor strip being coated with a meltable insulating varnish and whereby the insulating varnish is heated and the conductor strip is pressed onto the substrate. A device is also provided for producing a circuit pattern comprising a conductor strip coil and a cylindrical or conical laying tool, which at least over a part of its length has an interior bore guiding the conductor strip and an annular active area arranged perpendicular to its longitudinal axis and merging in inner and outer radius.
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