Importance

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Abstract

The present invention relates to a silicon wafer having interconnection metal. The silicon wafer includes a silicon substrate, at least one electrical device, a barrier layer, a metal layer, at least one first interconnection metal and at least one second interconnection metal. The electrical device is disposed in the silicon substrate, and exposed to a first surface of the silicon substrate. The barrier layer is disposed on the first surface of the silicon substrate. The metal layer is disposed on a surface of the barrier layer. The first interconnection metal penetrates the barrier layer, and is disposed on the electrical device. The first interconnection metal connects the metal layer and the electrical device. The second interconnection metal penetrates the barrier layer, and is disposed at a corresponding position on the outside of the electrical device. The second interconnection metal connects the metal layer. Thus, after a silicon through via is formed, the silicon through via is connected to the metal layer by the second interconnection metal, so the yield rate is raised.

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First Claim