Semiconductor Carrier for Multi-Chip Packaging
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United States of America Patent
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Issued Date -
Sep 16, 2010
app pub date -
Mar 12, 2009
filing date -
Mar 12, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A power semiconductor product includes a carrier attached to a leadframe. An insulating layer is formed on the carrier and two or more conductive plates are patterned on the insulating layer. A control IC is attached to one of these conductive plates and a power transistor is attached to the other. Bond wires connect the first conductive plate to a pin on the leadframe. Additional bond wires attach the control IC to pins on the leadframe and form connections between the control IC and the power transistor.
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