Microprocessor with Compact Instruction Set Architecture
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United States of America Patent
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Issued Date -
Dec 9, 2010
app pub date -
Mar 26, 2010
filing date -
May 8, 2008
priority date (Note) -
Abandoned
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Abstract
A re-encoded instruction set architecture (ISA) provides smaller bit-width instructions or a combination of smaller and larger bit-width instructions to improve instruction execution efficiency and reduce code footprint. The ISA can be re-encoded from a legacy ISA having larger bit-width instructions, and the re-encoded ISA can maintain assembly-level compatibility with the ISA from which it is derived. In addition, the re-encoded ISA can have new and different types of additional instructions, including instructions with encoded arguments determined by statistical analysis and instructions that have the effect of combinations of instructions.
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