Interleaved memory program and verify method, device and system
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United States of America Patent
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Aug 23, 2011
Grant Date -
Dec 23, 2010
app pub date -
Aug 27, 2010
filing date -
Dec 20, 2006
priority date (Note) -
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Abstract
An interleaved memory programming and verification method, device and system includes a memory array including first and second memory banks of memory cells. The memory device further includes a controller configured to concurrently program a first data into the first memory bank and a second data into the second memory bank using iterative programming and verification operations in each of the first and second memory banks with the programming and verification operations in the second memory bank being offset from the programming and verification operations in the first memory bank.
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