Mechanism for clock synchronization

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United States of America Patent

PATENT NO 8385333
APP PUB NO 20100329285A1
SERIAL NO

12495500

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Abstract

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A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.

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Patent Owner(s)

  • INTEL CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Harriman, David J Portland, US 139 2337
Stanton, Kevin Hillsboro, US 19 277

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