US Patent Application No: 2011/0029,751

Number of patents in Portfolio can not be more than 2000

ENHANCED BLOCK COPY

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The present disclosure includes methods and apparatus for an enhanced block copy. One embodiment includes reading data from a source block located in a first portion of the memory device, and programming the data to a target block located in a second portion of the memory device. The first and second portions are communicatively coupled by data lines extending across the portions. The data lines are communicatively uncoupled between the first and second portions for at least one of the reading and programming acts.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddressTotal Patents
MICRON TECHNOLOGY, INC.BOISE, ID19262

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nobunaga, Dean K Cupertino, US 9 25

Cited Art Landscape

Patent Info (Count) # Cites Year
 
ROUND ROCK RESEARCH, LLC (9)
* 6,877,100 Adjustable timing circuit of an integrated circuit by selecting and moving clock edges based on a signal propagation time stored in a programmable non-volatile fuse circuit 8 2000
* 6,496,434 Differential sensing in a memory using two cycle pre-charge 7 2000
* 6,307,790 Read compression in a memory 21 2000
* 6,304,510 Memory device address decoding 47 2000
* 6,584,025 Read compression in a memory 8 2001
* 6,693,841 Read compression in a memory 8 2003
* 7,193,910 Adjustable timing circuit of an integrated circuit 6 2004
* 7,130,227 Adjustable timing circuit of an integrated circuit 5 2005
* 7,280,398 System and memory for sequential multi-plane page memory operations 92 2006
 
Micron Technology, Inc. (15)
* 6,310,809 Adjustable pre-charge in a memory 36 2000
* 6,507,525 Differential sensing in a memory 14 2000
* 6,678,201 Distributed FIFO in synchronous memory 6 2002
* 7,080,275 Method and apparatus using parasitic capacitance for synchronizing signals a device 5 2002
* 7,231,537 Fast data access mode in a memory device 11 2003
* 2006/0168,414 Memory block locking apparatus and methods 3 2005
* 7,480,195 Internal data comparison for memory testing 2 2005
* 2005/0265,060 Adjustable timing circuit of an integrated circuit 2 2005
* 7,292,487 Independent polling for multi-page programming 5 2006
* 2006/0248,368 Fast data access mode in a memory device 2 2006
* 7,272,694 Chip protection register lock circuit in a flash memory device 7 2006
* 2008/0177,933 Defective memory block remapping method and system, and memory device and processor-based system using same 5 2007
* 2008/0181,014 Programming a non-volatile memory device 11 2007
* 8,145,866 Selective register reset 2 2008
* 2009/0116,301 INTERNAL DATA COMPARISON FOR MEMORY TESTING 2 2008
 
SAMSUNG ELECTRONICS CO., LTD. (1)
* 7,672,160 3-level non-volatile semiconductor memory devices and related methods 4 2007
 
KABUSHIKI KAISHA TOSHIBA (1)
* 2005/0172,086 Non-volatile semiconductor memory device and electric device with the same 6 2004
 
HYNIX SEMICONDUCTOR INC. (1)
* 2007/0002,621 Non-volatile memory device, and multi-page program, read and copyback program method thereof 3 2005
* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
Micron Technology, Inc. (2)
8,645,752 Apparatuses and methods for operating a memory device 0 2011
9,158,607 Apparatuses and methods for operating a memory device 0 2014
 
SAMSUNG ELECTRONICS CO., LTD. (1)
* 9,335,937 Method of operating a flash memory system using a migration operation 0 2015
 
HYNIX SEMICONDUCTOR INC. (1)
* 2012/0268,993 SEMICONDUCTOR MEMORY DEVICE 0 2012
* Cited By Examiner