Semiconductor device and method for manufacturing the same

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United States of America Patent

PATENT NO 8409941
APP PUB NO 20110062502A1
SERIAL NO

12841406

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Abstract

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The present invention proposes a method of forming a dual contact plug, comprising steps of: forming a source/drain region and a sacrificed gate structure on a semiconductor substrate, the sacrificed gate structure including a sacrificed gate; depositing a first inter-layer dielectric layer; planarizing the first inter-layer dielectric layer to expose the sacrificed gate in the sacrificed gate structure; removing the sacrificed gate and depositing to form a metal gate; etching to form a first source/drain contact opening in the first inter-layer dielectric layer; sequentially depositing a liner and filling conductive metal in the first source/drain contact opening to form a first source/drain contact plug; depositing a second inter-layer dielectric layer on the first inter-layer dielectric layer; etching to form a second source/drain contact opening and a gate contact opening in the second inter-layer dielectric layer; and sequentially depositing a liner and filling conductive metal in the second source/drain contact opening and the gate contact opening to form a second source/drain contact plug and a gate contact plug. The present invention also proposes a semiconductor device manufactured by the above process.

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Patent Owner(s)

Patent OwnerAddress
INSTITUTE OF MICROELECTRONICS CHINESE ACADEMY OF SCIENCESNO 3 BEITUCHENG WEST ROAD CHAOYANG DISTRICT BEIJING 100029 100029

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Luo, Zhijiong Poughkeepsie, US 255 4762
Yin, Haizhou Poughkeepsie, US 244 3095
Zhu, Huilong Poughkeepsie, US 705 13304

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