SEMICONDUCTOR DEVICE HAVING WAFER-LEVEL CHIP SIZE PACKAGE

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United States of America Patent

SERIAL NO

12960717

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor device including a semiconductor substrate with circuit elements and electrode pads formed on one surface. The surface is covered by a dielectric layer with openings above the electrode pads. A metal layer is included on the dielectric layer and patterned to form a conductive pattern with traces leading to the electrode pads. A protective layer is included as having openings exposing part of the conductive pattern. Each opening is covered by an electrode such as a solder bump, which is electrically connected through the conductive pattern to one of the electrode pads. The thickness of the protective layer, which may function as a package of the semiconductor device, is thus reduced. The protective layer may be formed from a photosensitive material, simplifying the formation of the openings for the electrodes.

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Patent Owner(s)

Patent OwnerAddress
OKI SEMICONDUCTOR CO LTD550-1 HIGASHIASAKAWA-CHO HACHIOJI-SHI TOKYO 193-8550

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Watanabe, Kiyonori Tokyo, JP 21 118

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