Block boundary resolution for mismatched logical and physical block sizes
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United States of America Patent
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Jun 3, 2014
Grant Date -
Apr 28, 2011
app pub date -
Oct 23, 2009
filing date -
Oct 23, 2009
priority date (Note) -
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Abstract
The present disclosure describes various techniques resolving block boundary issues and reconstructing logical blocks in a block access storage device when there are resulting mismatches between logical and physical block sizes or alignments, such that logical blocks span multiple physical block boundaries in irregular ways. In one example, a method comprises the following features: receiving logical block addresses that are associated with a sequence of logical blocks; and locating a first portion of a logical block within a first physical block that is stored in a block access storage device based upon a logical block address of the logical block, wherein the logical block is part of the sequence of logical blocks, and wherein at least two logical blocks within the sequence of logical blocks have different sizes.
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