FERROELECTRIC ORGANIC MEMORIES WITH ULTRA-LOW VOLTAGE OPERATION
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United States of America Patent
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Issued Date -
May 12, 2011
app pub date -
May 29, 2009
filing date -
May 30, 2008
priority date (Note) -
Abandoned
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Abstract
A method of manufacturing a patterned ferroelectric polymer memory medium is disclosed, which includes forming an electrode on a substrate; forming a ferroelectric polymer thin film on the electrode; and patterning and orienting the polymer thin film into a plurality of nanostructures by embossing techniques. Also disclosed are two methods which include forming nanofeatures in an interlayer dielectric (ILD) layer deposited on a substrate; forming a ferroelectric polymer thin film on the ILD layer in the nanofeatures; and patterning and orienting the polymer thin film into a plurality of nanostructures by pressing. The patterning process followed by an annealing process promotes specific crystal orientation, which significantly reduces the operation voltage, and increases the signal-to-noise ratio. The invention also covers devices made of a ferroelectric polymer layer oriented by such an embossing method and the use of such devices at a coercive field of 10 MV/m or less.
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