METHOD FOR MANUFACTURING TWIN BIT STRUCTURE CELL WITH FLOATING POLYSILICON LAYER

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United States of America Patent

APP PUB NO 20110140192A1
SERIAL NO

12969563

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Abstract

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A method for forming a twin-bit cell structure is provided. The method includes providing a semiconductor substrate including a surface region. A gate dielectric layer is formed overlying the surface region. The method forms a polysilicon gate structure overlying the gate dielectric layer. In a specific embodiment, the method subjects the gate polysilicon structure to an oxidizing environment to cause formation of a first silicon oxide layer overlying the gate polysilicon structure. Preferably, an undercut region is allowed to be formed underneath the gate polysilicon structure. The method includes forming an undoped polysilicon material overlying the polysilicon gate structure including the undercut region and the gate dielectric layer. The undoped polysilicon material is subjected to a selective etching process to form an insert region in a portion of the undercut region while the insert region remains filled with the undoped polysilicon material.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION18 ZHANGJIANG ROAD PUDONG NEW AREA SHANGHAI 201203
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATIONNO 18 WEN CHANG RD ECONOMIC-TECHNOLOGICAL DEVELOPMENT AREA DAXING DISTRICT BEIJING 100716

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
FUMITAKE, MIENO Shanghai, CN 43 311

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