Circuits for Reducing Power Consumption of Memory Components
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United States of America Patent
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N/A
Issued Date -
Jun 16, 2011
app pub date -
Dec 14, 2010
filing date -
Dec 14, 2009
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
An integrated circuit including one or more data links. A respective data link includes a precharge circuit, a voltage generator circuit, and a transmitter circuit. The precharge circuit is configured to precharge a data line to a predefined voltage level between transmission of symbols on the data line. The voltage generator circuit is configured to generate one or more transmit voltage levels, wherein a respective transmit voltage level represents a respective symbol to be transmitted on the data line and provide current from a voltage source to a transmitter circuit to drive the data line to a transmit voltage level representing a symbol to be transmitted, wherein the current drawn from the voltage source is independent of previously transmitted symbols. The transmitter circuit is configured to receive the symbol to be transmitted and drive the data line to the transmit voltage level using the current provided by the voltage generator circuit.
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