OPTIMIZING PCB POWER AND GROUND CONNECTIONS FOR LEAD FREE SOLDER PROCESSES
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United States of America Patent
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app pub date -
Jan 4, 2011
filing date -
Dec 31, 2009
priority date (Note) -
Abandoned
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Abstract
Apparatuses and methods that provide for enhanced connections between PTHs of multi-layer PCBs and electronic component leads, pins or the like. The apparatuses and methods improve the likelihood that the PTHs are completely filled with solder thereby advantageously allowing the PCBs to exhibit high mechanical and electrical reliability. Complete filling of PTHs is achieved by configuring the electrically conductive layers within the multi-layer PCB stack in a manner that reduces the heat sinking effects of the layers during the soldering process. In this regard, the PTHs may not directly contact all of the internal ground or power planes, so the heat sinking or heat transfer effects are reduced. This feature enables molten solder to substantially or completely fill an entire PTH before freezing.
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