CMOSFET device with controlled threshold voltage and method of fabricating the same
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United States of America Patent
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Apr 2, 2013
Grant Date -
Jul 14, 2011
app pub date -
Jun 24, 2010
filing date -
Jun 26, 2009
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Abstract
There is provided a CMOSFET device with a threshold voltage controlled by means of its gate stack configuration and a method of fabricating the same. The CMOSFET device comprises: a semiconductor substrate; am interface layer grown on the silicon substrate; a first high-k gate dielectric layer deposited on the interface layer; a very thin metal layer deposited on the first high-k gate dielectric layer; a second high-k gate dielectric layer deposited on the very thin metal layer; and a gate electrode layer deposited on the second high-k gate dielectric layer.
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