LINE-REFLECT-REFLECT MATCH CALIBRATION

United States of America Patent

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Mar 11, 2011
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Jun 11, 2005

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Abandoned

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Abstract

A method of compensating a calibration for a vector network analyzer includes performing calibrations on at least a pair of ports to determine error terms associated with each port wherein at least one of the error terms is based upon selecting the reactance of the load standard from a set of potential values in a manner such that the reference reactance errors are reduced.

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Patent Owner(s)

Patent Owner	Address
CASCADE MICROTECH INC	9100 SW GEMINI DRIVE BEAVERTON OR US 97008

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G06F:ELECTRIC DIGITAL DATA PROCESSING

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[Patents Count]

Inventor(s)

Inventor Name	Address	# of filed Patents	Total Citations
Hayden, Leonard	Portland, US	26	484

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LINE-REFLECT-REFLECT MATCH CALIBRATION

Number of patents in Portfolio can not be more than 2000

United States of America Patent

13046171

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13046171

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