Semiconductor memory having non-standard form factor
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United States of America Patent
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Jun 25, 2013
Grant Date -
Jul 28, 2011
app pub date -
Jan 26, 2010
filing date -
Jan 26, 2010
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Abstract
A semiconductor memory chip including error correction circuitry configured to receive data words from an external device, each data word comprising a binary number of data bits, and configured to error encode each data word to form a corresponding coded word comprising a non-binary number of data bits including the data bits of the data word and a plurality of error correction code bits. At least one memory cell array is configured to receive and store the coded word and partitioned based on the non-binary number of bits of the coded word so as to have a non-binary number of wordlines and provide the memory chip with an aspect ratio other than a 2:1 aspect ratio.
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