Reducing Jitter in a Recovered Data Stream Clock of a Video DisplayPort Receiver

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20110193970A1
SERIAL NO

13012986

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The system and method, applicable to video display port applications, reduces the jitter in a regenerated data stream clock by using a first-in first-out (FIFO) storage memory to average the variations thereto. The method comprises loading the data extracted from data packets, received over a high speed connection, into the FIFO and running the application using the data in the FIFO. An initial frequency value of the stream clock Fvid is generated from the link clock Flink. Two integer values received over the link, M and N, that establishes a relationship between Flink and Fvid, are used to initiate recovery of Fvid. Lower and upper limits are set for data in the FIFO and the value of Fvid is adjusted to keep the level of data stored in the FIFO within these limits. Accordingly, variations of Fvid are averaged over the limits of the FIFO, thereby reducing the jitter.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
ANALOGIX SEMICONDUCTOR INC3211 SCOTT BOULEVARD SUITE 100 SANTA CLARA CA 95054

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Zhu, Ning San Jose, US 136 1600

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation