OPTIMIZING STORAGE OF COMMON PATTERNS IN FLASH MEMORY
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United States of America Patent
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app pub date -
Mar 4, 2009
filing date -
Mar 19, 2008
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
One embodiment of the present invention provides a method of operation within a flash memory system. During operation, the system receives write data and a corresponding logical address. The system then determines whether the write data matches a predetermined data pattern. If the write data does match the predetermined data pattern, instead of writing the data, the system records an indication that the predetermined data pattern corresponds to the logical address.
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