METHODS AND APPARATUS FOR OPTIMIZING CONCURRENCY IN MULTIPLE CORE SYSTEMS
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United States of America Patent
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Issued Date -
Sep 1, 2011
app pub date -
Mar 1, 2010
filing date -
Mar 1, 2010
priority date (Note) -
Abandoned
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Abstract
Various methods and apparatus are described for communicating transactions between one or more initiator IP cores and one or more target IP cores coupled to an interconnect. Tag logic may be located within the interconnect, such as located in an agent, and configured to assign different interconnect tag identification numbers to two or more transactions from a same thread. The tag logic assigns different interconnect tag identification numbers to allow the two or more transactions from the same thread to be outstanding over the interconnect to two or more different target IP cores at the same time, allow the two or more transactions from the same thread to be processed in parallel over the interconnect, and potentially serviced out of issue order while being returned back to the multiple threaded initiator IP core realigned in expected execution order.
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